Sejarah IC TTL

BAB II

PEMBAHASAN



2.1.1 Sejarah

TTL ditemukan oleh James L. Buie dari TRW, "particularly suited to the newly developing integrated circuit design technology". IC TTL komersial pertama dibuat oleh Sylvania pada 1963, dinamai Sylvania Universal High-Level Logic family (SUHL). Peranti dari Sylvania ini digunakan dalam misil Phoenix. TTL menjadi terkenal pada pendesain sistem elektronik setelah Texas Instruments memperkenalkan seri 5400, dengan daerah suhu untuk militer, pada 1964 dan pada akhirnya seri 7400 pada 1966 dengan daerah suhu yang lebih rendah. Keluarga 7400 dari Texas Instrument menjadi standar industri. Peranti yang cocok dibuat oleh Motorola, AMD, Fairchild, Intel, Intersil, Signetics, Mullard, Siemens, SGS-Thomson/ST microelectronic dan National Semiconductor, dan banyak perusahaan lainnya, bahkan di bekas Uni Soviet. Tidak hanya membuat peranti TTL yang kompatibel, tetapi peranti kompatibel juga dibuat dengan menggunakan teknologi sirkuit lainnya. Istilah TTL digunakan pada banyak logika penyempurnaan yang menggunakan transistor dwikutub, dengan beberapa penyempurnaan di kecepatan dan kebutuhan daya selama lebih dari dua dekade. Keluarga populer yang terakhir adalah 74AS/ALS Advanced Schottky, dikenalkan pada 1985. Hingga 2009, Texas Instruments tetap memproduksi IC kegunaan umum dalam banyak keluarga teknologi usang, walaupun dengan harga yang semakin mahal. Biasanya, chip TTL memadukan tidak lebih dari beberapa ratus transistor. Fungsi yang dipunyai sebuah kemasan tunggal bervariasi dari beberapa gerbang logika hingga mikroprosesor. TTL juga menjadi penting karena harganya yang muram membuat teknik digital cukup ekonomis untuk menggantikan pekerjaan yang sebelumnya dilakukan oleh teknik analog. Kenbak-1, salah satu komputer pribadi pertama, menggunakan TTL untuk CPU daripada menggunakan mikroprosesor yang belum tersedia pada tahun 1971. 1973 Xerox Alto dan 1981 Star, yang mengenalkan GUI, menggunakan sirkuit TTL pada taraf ALU. Banyak komputer yang menggunakan logika kompatibel-TTL hingga tahun 1990-an. Hingga penemuan logika dapat diprogramkan, logika dwikutub tersendiri digunakan untuk percobaan dan pengembangan sirkuit digital terpadu lainnya.




2.3 Tabel Technical Spec IC


No IC

Fungsi logika

Teknologi

Level Tegangan


CAN00001

Quad Buffer

BICMOS

4.5V~5.5V


CAN00002

Octal Driver / Line Driver

BICMOS

4.5V~5.5V


CAN00003

Octal Driver / Line Driver

BICMOS

4.5V~5.5V


CAN00004

Octal Driver / Line Driver

CMOS

2.0V~6.0V


CAN00005

Octal Driver / Line Driver

CMOS

2.0V~6.0V


CAN00006

Octal Driver / Line Driver

CMOS

2.0V~6.0V


CAN00008

Octal Driver / Line Driver

CMOS

4.5V~5.5V


CAN00009

Octal Driver / Line Driver

CMOS

4.5V~5.5V


CAN00010

Single Bus Buffer Gate

CMOS

2V~5.5V


CAN00011

Quad Bus Buffer Gate

CMOS

4.5V~5.5V


CAN00012

Single Bus Buffer Gate

CMOS

4.5V~5.5V


CAN00013

Octal Bus Driver

TTL

4.5V~5.5V


CAN00014

Octal Driver / Line Driver

TTL

4.5V~5.5V


CAN00015

Octal Driver / Line Driver

TTL

4.5V~5.5V


CAN00016

Octal Driver / Line Driver

TTL

4.5V~5.5V


CAN00017

Octal Driver / Line Driver

TTL

4.5V~5.5V


CAN00018

Octal Driver / Line Driver

CMOS

3V~15V







7400 N

Quadruple door NOT - AND at 2 entries


7401 N

Quadruple door NOT - AND at 2 entries with open collector


7402 N

Quadruple door NOT - OR at 2 entries


7403 N

Quadruple door NOT - AND at 2 entries with open collector


7404 N

6 reversers


7405 N

6 reversers with open collector


7406 N

6 stages of attack reverser to open collector for 40 my


7407 N

6 stages of attack to open collector for 40 my


7408 N

Quadruple door AND at 2 entries


7409 N

Quadruple door AND at 2 entries with open collector


7410 N

Triple carries NOT - AND at 3 entries


7411 N

Triple carries AND to 3 entry


7412 N

Triple carries NOT - AND at 3 entries with open collector


7413 N

Double door NOT - AND at 4 entries


7414 N

6 reversers trigger


7416 N

6 reversers of powers to open collector


7417 N

6 stages of attack to open collector for 40 my


7420 N

Double door NOT - AND at 4 entries


7422 N

Double door NOT - AND at 4 entries with open collector


7423 N

Double door NOT - OR at 4 entries expansible and strobe


7425 N

Double door NOT - OR at 4 entries and strobe


7426 N

Quadruple door NOT - AND with 2 entries - High voltage


7427 N

Triple carries NOT - OR at 3 entries


7428 N

Quadruple NOR door at 2 entries


7430 N

Carry NOT - AND at 8 entries


7432 N

Quadruple door OR at 2 entries


7437 N

Quadruple door NOT - AND of power at 2 entries


7438 N

Quadruple door NOT - AND of power at 2 entries and open collector


7440 N

Double door NOT - AND of power at 4 entries


7442 N

Decimal decoder BCD


7443 N

Decoder excesses of 3 - decimal


7444 N

Decoder excesses of 3 Gray - decimal


7445 N

Decimal decoder BCD with open collector for 80 my and 30 V or 15 V


7446 AN

Decoder BCD 7 segments with open collector with 30 V/20 my


7447 AN

Decoder BCD 7 segments with open collector with 30 V/20 my


7448 N

Decoder BCD 7 segments


7450 N

Double door AND/OR - NOT to 2 X 2 entries


7451 N

Double door reverser AND/OR - NOT to 2 X 2 entries


7453 N

Carry reverser AND/OR - NOT to 4 X 2 entries expansible


7454 N

Carry reverser AND/OR - NOT to 4 X 2 entries


7460 N

Double door of multiplication at 4 entries


7470 N

Flip-flop JK to 2 X 3 entries


7472 N

Main flip-flop slave with 2 X 3 entries


7473 N

Main flip-flop slave with entry reset


7474 N

Double Flip-flop D synchronous


7475 N

Quadruple Flip-flop D asynchronous


7476 N

Double main Flip-flop JK slave with entries set and reset


7480 N

Full adder with 1 bit


7481 N

Memory with 16 bits writing/reading


7482 N

Full adder with 2 bits


7483 AN

Full adder with 4 bits


7484 AN

Memory with 16 bits writing/reading at 2 entries of writing and reading


7485 N

Binary comparator with 4 bits


7486 N

Quadruple door OR Exclusive


7489 N

Memory with 64 bits writing/reading with open collector


7490 AN

Decimal scaler


7491 AN

Register with shift with 8 bits series


7492 N

Divider by 12


7493 N

Binary counter


7494 N

Register with shift 4 bits at parallel entry


7495 AN

Register with shift 4 bits entered and 4 parallel ports


7496 N

Register with parallel shift 5 bits


7497 N

Divider of synchronous binary frequency programmable 6 bits


74100 N

Octo-Flip-failure D


74107 N

Double main Flip-flop JK slave with entry reset


74110 N

Main flip-flop JK slave with blocking of entry


74111 N

Double main Flip-flop JK slave with blocking of entry


74118 N

Sixfold Flip-flop RS at common entry of reset


74120 N

Double synchronization of impulses


74121 N

Monostable


74122 N

Monostable redéclenchable at entry reset


74123 N

Double monostable redéclenchable at entry reset


74125 N

4 doors YES at exits 3 states


74132 N

Quadruple Trigger de Schmitt NOT - AND at 2 entries


74141 AN

Decimal decoder BCD for tubes of posting


74142 N

Decimal scaler and ordering of NIXIE


74145 N

Decimal decoder BCD with open collector for 80 my and 30 V or 15 V


74148 N

8 To 3 Line Priority Encoder


74150 N

Selector of data 16 bits/multiplexer


74151 N

Selector of data 8 bits/multiplexer


74153 N

Double selector of data 4 bits/multiplexer


74154 N

Binary decoder 4 bits/demultiplexer


74155 N

Double binary decoder 2 bits/demultiplexer


74156 N

Double binary decoder 2 bits/demultiplexer


74157 N

Quadruple selector of information 2 bits/multiplexer


74160 N

Synchronous decimal scaler at entry of set and reset


74161 N

Synchronous decimal scaler at entry of set and reset


74162 N

Synchronous binary counter 4 bits at entry of set and reset


74163 N

Synchronous binary counter 4 bits at entry of set and reset


74164 N

Register with shift 8 bits at parallel port


74165 N

Register shift 8 bits at parallel entry


74166 N

Register with synchronous shift 8 bits at parallel entry


74167 N

Divider of frequencies, decimal


74170 N

Memory with 16 bits writing/reading with words to 4 bits


74174 N

Sixfold Flip-flop D at entry of reset


74175 N

Quadruple Flip-flop D synchronous


74180 N

Parity check 8 bits


74181 N

Arithmetic logical unit 4 bits


74184 N

Binary converter BCD 6 bits


74185 AN

Binary converter BCD 6 bits


74190 N

Reversible decimal scaler for synchronous counting chain


74191 N

Reversible binary counter for synchronous counting chain


74192 N

Meter decimal discounting machine with set and reset


74193 N

Binary meter discounting machine with set and reset


74194 N

Register with synchronous 4 bits right-hand side/left parallel shift


74195 N

Register with synchronous shift parallel 4 bits with entry JK


74196 N

Decimal scaler 50 MHz with entry of set and reset


74197 N

Binary counter 50 MHz with entry of set and reset


74198 N

Register with synchronous shift 8 bits at entry and port parallel


74199 N

Register with synchronous shift 8 bits parallel at entry JK


74LS241

Driver of bus not reverser


74LS242

Quad drunk transceiver inverting


74LS243

4 transcoders not reverser 3 states


81LS95

74795 : Octal Buffer with Three-State Outputs (74LS795 is equivalent to 81LS95)


81LS97

74797 : Octal Buffer with Three-State Outputs (74LS797 is equivalent to 81LS97)